Science and Mathematics Faculty Publications

Dynamic Memory Disambiguation Using the Memory Conflict Buffer

Document Type

Conference Proceeding

Publication Date

10-1994

Journal Title

Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems

Volume

29

Issue

11

First Page

183

Last Page

193

DOI

10.1145/195470.195534

Abstract

To exploit instruction level parallelism, compilers for VLIW and superscalar processors often employ static code scheduling. However, the available code reordering may be severely restricted due to ambiguous dependences between memory instructions. This paper introduces a simple hardware mechanism, referred to as the memory conflict buffer, which facilitates static code scheduling in the presence of memory store/load dependences. Correct program execution is ensured by the memory conflict buffer and repair code provided by the compiler. With this addition, significant speedup over an aggressive code scheduling model can be achieved for both non-numerical and numerical programs.

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