Dynamic Memory Disambiguation Using the Memory Conflict Buffer
Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems
To exploit instruction level parallelism, compilers for VLIW and superscalar processors often employ static code scheduling. However, the available code reordering may be severely restricted due to ambiguous dependences between memory instructions. This paper introduces a simple hardware mechanism, referred to as the memory conflict buffer, which facilitates static code scheduling in the presence of memory store/load dependences. Correct program execution is ensured by the memory conflict buffer and repair code provided by the compiler. With this addition, significant speedup over an aggressive code scheduling model can be achieved for both non-numerical and numerical programs.
Gallagher, David M.; Chen, W. Y.; Mahlke, S. A.; Gyllenhaal, J. C.; and Hwu, W. W., "Dynamic Memory Disambiguation Using the Memory Conflict Buffer" (1994). Science and Mathematics Faculty Publications. 339.